SiFive, a processor design company pursuing the open hardware model of RISC-V, is unveiling two new processor cores that go after performance applications.
San Mateo, California-based SiFive isn’t just attacking Arm-based competition at the low end of the performance range — where Arm dominates, thanks to its power efficiency and long history in the market. It’s also going after performance applications beyond the low-end embedded processor market.
SiFive is one of the companies designing RISC-V architecture processors as an alternative to Arm’s processor architecture in the wake of Nvidia’s $40 billion acquisition of the world’s leading processor architecture. Intel Foundry Services was the lead development partner for SiFive, and Intel is an investor in SiFive.
SiFive designs processors that can be customized for whatever its customers need, for products ranging from the low end to the high end of the computing spectrum. The processors are based on RISC-V, a free and open architecture created by university researchers a decade ago. They were motivated by principles of “hardware freedom” to offer an alternative to royalty-based processors like those licensed for a fee and controlled by a single company.
Processor intellectual property
The P270 processor is SiFive’s first Linux-capable processor with full support for the RISC-V vector extension v1.0 rc, and the company is also unveiling the SiFive P550 core, its highest performance processor to date.
The new SiFive Performance P550 delivers a SPECInt 2006 score of 8.65/GHz, making it the highest performance RISC-V processor available today and comparable to existing proprietary solutions in the application processor space, the company said.
Yunsup Lee, chief technology officer of SiFive, said in a statement that the goal is to deliver a complete, scalable portfolio of RISC-V cores to customers who are at the vanguard of chip design and are not happy with the status quo. These two products cover new performance points and a wide range of application areas, from efficient vector processors that easily displace yesterday’s SIMD architectures to the bleeding edge the P550 represents, he said.
The company said it is ready to deliver these products to customers today. Intel fellow Amber Huffman said Intel was happy to be a lead development partner with SiFive to showcase the tech on its 7nm Horse Creek platform for SiFive customers. The solution combines Intel’s edge interface IP — such as DDR and PCIe — with SiFive’s highest performance processor, making Horse Creek a valuable and expandable development vehicle for cutting-edge RISC-V applications, Huffman said.
Kevin Krewell, principal analyst at Tirias Research, said in a statement that SiFive is growing from its initial success in embedded processors to tackle the application processor market. That requires performance, efficiency, and features demonstrated in the new P550 core, he said. With a growing open source software ecosystem for RISC-V developed by leading technology industry companies, chip designers have a real choice for their next system-on-chip application processor core, Krewell said.
In an email to VentureBeat, Krewell said the offerings are highly competitive.
“For me, the support from Intel is also very important. I see it as a tacit validation of the SiFive design,” he said. “Both the P550 and the P270 are interesting. The P270 looks like an interesting accelerator with its vector extensions. The P550 has significant performance capabilities. The exact performance levels in Intel 7nm process should be very capable of supporting high-performance embedded processing and potentially datacenter applications like networking and storage.”
The SiFive Performance P550 features a 13-stage, triple-issue, out-of-order pipeline compatible with the RISC-V RV64GC instruction set architecture. Built on the previously announced SiFive U84 microarchitecture, Performance P550 scales up to four-core complex configurations that use a similar amount of area as a single Arm Cortex-A75 while delivering a significant performance-per-area advantage.
Meanwhile, the SiFive Performance P270 is an 8-stage, dual-issue, highly efficient in-order pipeline compatible with the RISC-V RV64GCV ISA. With full support for the RISC V Vector Extension v1.0 rc — and combined with SiFive Recode, which translates existing SIMD software from popular legacy architectures to RISC-V Vector assembly code — the P270 is a replacement for dated SIMD architectures.
The new SiFive Performance family joins the recently announced SiFive Intelligence family, which is focused on AI and machine learning applications, and the broadly adopted SiFive Essential family of configurable cores that includes the U/S/E-Series of 64-bit and 32-bit processors.
Both products in the SiFive Performance family are available now. SiFive will conduct a webinar with details about the SiFive Performance, Intelligence, and Essential product families on July 14.
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